Title :
A novel high-performance poly-silicon thin film transistor with a self-aligned thicker sub-gate oxide near the drain/source regions
Author :
Chang, Kow Ming ; Chung, Yuan Hung ; Lin, Gin Ming ; Lin, Jian Hong ; Deng, Chi Gun
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
Poly-Si TFTs with this new structure have been successfully fabricated and the results demonstrate a higher on-off current ratio of 5.9/spl times/10/sup 6/ and also shows the off-state leakage current 100 times lower than those of the conventional ones at V/sub GS/=-15 V and V/sub DS/=10 V. Only four photo-masking steps are required and fully compatible with the conventional TFT fabrication processes. This novel structure is a good candidate for the further high-performance large-area device applications.
Keywords :
elemental semiconductors; insulating thin films; leakage currents; masks; semiconductor device reliability; silicon; thin film transistors; -15 V; 10 V; Si; TFT fabrication processes; drain/source regions; large-area device applications; off-state leakage current; on-off current ratio; photo-masking steps; polysilicon thin film transistor; self-aligned thicker sub-gate oxide; Active matrix liquid crystal displays; Chemical vapor deposition; Electrodes; Etching; Fabrication; Grain boundaries; Grain size; Implants; Leakage current; Thin film transistors;
Journal_Title :
Electron Device Letters, IEEE
