Title :
The effects of transistor source-to-gate bridging faults in complex CMOS gates
Author :
Visweswaran, G.S. ; Ali, Akhtar-Uz-Zaman M. ; Lala, Parag K. ; Hartmann, Carlos R P
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol., New Delhi, India
fDate :
6/1/1991 12:00:00 AM
Abstract :
A study of the effect of gate-to-source bridging faults in the pull-up section of a complex CMOS gate is presented. The manifestation of these faults depends on the resistance value of the connection causing the bridging. It is shown that such faults manifest themselves either as stuck-at or stuck-open faults and can be detected by tests for stuck-at and stuck-open faults generated for the equivalent logic current. It is observed that for transistor channel lengths larger than 1 μm there exists a range of values of the bridging resistance for which the fault behaves as a pseudo-stuck-open fault
Keywords :
CMOS integrated circuits; fault location; integrated logic circuits; logic gates; bridging resistance; complex CMOS gates; equivalent logic current; pseudo-stuck-open fault; pull-up section; resistance value; stuck-at faults; stuck-open faults; transistor channel lengths; transistor source-to-gate bridging faults; Circuit faults; Circuit testing; Digital circuits; Electrical fault detection; Fault detection; Fault diagnosis; Integrated circuit interconnections; Logic circuits; Logic testing; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
