DocumentCode :
1539904
Title :
Practical reduction of dislocation density in SIMOX wafers
Author :
Nakashima, S. ; Izumi, Kiyotaka
Author_Institution :
NTT LSI Labs., Atsugi, Japan
Volume :
26
Issue :
20
fYear :
1990
Firstpage :
1647
Lastpage :
1649
Abstract :
The dislocation density in the superficial silicon layers of SIMOX wafers formed under different oxygen implantation conditions has been investigated using a Secco etching technique. An extremely low dislocation density in the order of 102 cm-2 has been obtained for waters implanted at 180 keV with a dose of 0.4*1018 and doses ranging from 0.9 to 1.2*1018O+/cm2 at a wafer temperature of 550 degrees C followed by post-implant anneal at temperatures higher than 1300 degrees C. The buried oxide layers of the SIMOX wafers have breakdown voltages higher than 40 V.
Keywords :
elemental semiconductors; ion implantation; semiconductor technology; semiconductor-insulator boundaries; silicon; 1300 C; 180 keV; 40 V; 550 C; O implantation conditions; SIMOX wafers; Secco etching technique; Si:O; SiO 2; annealing temperature; breakdown voltages; buried oxide layers; low dislocation density; post-implant anneal; reduction of dislocation density; semiconductors; superficial Si layers; wafer temperature;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19901055
Filename :
58157
Link To Document :
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