DocumentCode :
15403
Title :
1.2-mW Online Learning Mixed-Mode Intelligent Inference Engine for Low-Power Real-Time Object Recognition Processor
Author :
Jinwook Oh ; Seungjin Lee ; Hoi-Jun Yoo
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
Volume :
21
Issue :
5
fYear :
2013
fDate :
May-13
Firstpage :
921
Lastpage :
933
Abstract :
Object recognition is computationally intensive and it is challenging to meet 30-f/s real-time processing demands under sub-watt low-power constraints of mobile platforms even for heterogeneous many-core architecture. In this paper, an intelligent inference engine (IIE) is proposed as a hardware controller for a many-core processor to satisfy the requirements of low-power real-time object recognition. The IIE exploits learning and inference capabilities of the neurofuzzy system by adopting the versatile adaptive neurofuzzy inference system (VANFIS) with the proposed hardware-oriented learning algorithm. Using the programmable VANFIS, the IIE can configure its hardware topology adaptively for different target classifications. Its architecture contains analog/digital mixed-mode neurofuzzy circuits for updating online parameters to increase attention efficiency of object recognition process. It is implemented in 0.13-μm CMOS process and achieves 1.2-mW power consumption with 94% average classification accuracy within 1-μs operation delay. The 0.765-mm2 IIE achieves 76% attention efficiency and reduces power and processing delay of the 50-mm2 image processor by up to 37% and 28%, respectively, when 96% recognition accuracy is achieved.
Keywords :
CMOS integrated circuits; fuzzy reasoning; neural nets; object recognition; CMOS process; VANFIS; analog-digital mixed-mode neurofuzzy circuit; hardware controller; hardware-oriented learning algorithm; heterogeneous many-core architecture; intelligent inference engine; low-power object recognition processor; mobile platform; online learning mixed-mode engine; power 1.2 mW; real-time object recognition processor; size 0.13 micron; subwatt low-power constraint; versatile adaptive neurofuzzy inference system; Accuracy; Algorithm design and analysis; Hardware; Inference algorithms; Learning systems; Object recognition; Power demand; Mixed-mode processor; VLSI; neurofuzzy; object recognition;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2012.2198249
Filename :
6210400
Link To Document :
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