Title :
Experimental demonstration of complementary output switching logic approaching 10 Gb/s clock frequencies
Author :
Jeffery, M. ; Perold, W. ; Van Duzer, T.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fDate :
6/1/1997 12:00:00 AM
Abstract :
We have proposed a new type of voltage-state logic called Complementary Output Switching Logic (COSL). The COSL circuits were optimized for 5-10 GHz operation using a Monte Carlo method. Here we present experimental test results of the basic COSL gates in the frequency range 1-10 GHz, and discuss bit error rate measurements at 2-5 Gb/s.
Keywords :
Monte Carlo methods; SQUIDs; error statistics; integrated circuit layout; logic gates; superconducting device testing; superconducting logic circuits; very high speed integrated circuits; 1 to 10 GHz; 10 Gbit/s; 2 to 5 Gbit/s; BER measurements; COSL circuits; COSL gates; Josephson junction; Monte Carlo method; SQUID; bit error rate; complementary output switching logic; voltage-state logic; Bit error rate; Circuits; Clocks; Frequency; Josephson junctions; Logic; Optimization methods; SQUIDs; Switches; Voltage;
Journal_Title :
Applied Superconductivity, IEEE Transactions on
