Title :
RSFQ microprocessor: new design approaches
Author :
Bunyk, P. ; Kidiyarova-Shevchenko, A.Yu. ; Litskevitch, P.
Author_Institution :
Dept. of Phys., State Univ. of New York, Stony Brook, NY, USA
fDate :
6/1/1997 12:00:00 AM
Abstract :
We present a revised version of our previous RSFQ (Rapid Single Flux Quantum) microprocessor architecture and discuss approaches that we are using in the design of its functional units. In particular, the data processing pipeline built of D/sup 2/ cells, a 16-bit pipelined register block and an all-RSFQ self-reset decoder suitable for pipelined implementation are described in detail. Methods of VHDL description and verification of RSFQ circuitry are also discussed.
Keywords :
decoding; hardware description languages; logic CAD; microprocessor chips; pipeline processing; superconducting logic circuits; superconducting processor circuits; RSFQ circuitry; RSFQ microprocessor; VHDL description; data processing pipeline; microprocessor architecture; pipelined register bloc; rapid single flux quantum logic; self-reset decoder; verification; Appropriate technology; CMOS logic circuits; Delay; Josephson junctions; Logic circuits; Logic devices; Microprocessors; Physics; Pipelines; Space technology;
Journal_Title :
Applied Superconductivity, IEEE Transactions on
