Title :
Built-in self-testing of random-access memories
Author :
Franklin, Manoj ; Saluja, Kewal K.
Author_Institution :
Wisconsin Univ., Madison, WI, USA
Abstract :
Built-in self-test (BIST) methods are examined, including the fault models and the test algorithms on which the BIST implementations are based. The notion of generic test architectures suitable for implementing a wide variety of test algorithms is introduced. A taxonomy for test architectures is provided and used to categorize BIST implementations, and important implementations are surveyed. It is demonstrated that BIST is a viable solution to the problem of testing large memories and that approaches based on test architectures rather than on test algorithms are more versatile and will likely predominate in the future.<>
Keywords :
built-in self test; memory architecture; random-access storage; fault models; generic test architectures; random-access memories; test algorithms; test architectures; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Clocks; Costs; Logic circuits; Logic testing; Programmable logic arrays; Read-write memory;
