• DocumentCode
    1541204
  • Title

    On the use of yielded cost in modeling electronic assembly processes

  • Author

    Becker, Daniel V. ; Sandborn, Peter A.

  • Author_Institution
    CALCE Center for Electron. Packaging, Maryland Univ., College Park, MD, USA
  • Volume
    24
  • Issue
    3
  • fYear
    2001
  • fDate
    7/1/2001 12:00:00 AM
  • Firstpage
    195
  • Lastpage
    202
  • Abstract
    Yielded cost is defined as cost divided by yield and can be used as a metric for representing an effective cost per good (nondefective) assembly for a manufacturing process. Although yielded cost is not a new concept, it has no consistent definition in engineering literature, and several different formulations and interpretations exist in the context of manufacturing and assembly. In manufacturing, yield is the probability that an assembly is nondefective. To find the effective cost per good assembly that is invested in the manufacturing or assembly process, cost is accumulated and divided by the yield at the end of the process. This paper reviews and correlates existing yielded cost formulations and presents a new approach that enables consistent measurement of sequential process flows. This new approach defines the yielded cost associated with an individual process step (step yielded cost) as the change in the process´s yielded cost when the step is removed from the process. This approach is preferred because it incorporates upstream and downstream information and because it provides a prediction of a specific process step´s effective cost per good assembly that is independent of step order between steps that scrap defective product
  • Keywords
    assembling; economics; electronic equipment manufacture; modelling; defective product; downstream information; electronic assembly processes; manufacturing process; sequential process flows; upstream information; yielded cost; Assembly; Costs; Economic forecasting; Electronics packaging; Fault detection; Manufacturing industries; Manufacturing processes; Product design; Semiconductor device measurement; Testing;
  • fLanguage
    English
  • Journal_Title
    Electronics Packaging Manufacturing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1521-334X
  • Type

    jour

  • DOI
    10.1109/6104.956805
  • Filename
    956805