Reduced complexity symbol detectors with parallel structure for ISI channels

The problem of practical realization of the optimal fixed-delay symbol-by-symbol detection algorithm, which is optimum in the sense of minimizing the symbol error probability, given a delay constraint D, is investigated. A fully-parallel structure is developed, and through systematic reformulations of the algorithm, the computational requirements are reduced considerably. In addition, the problems associated with a large dynamic range such as overflow (or underflow) are (practically) removed. A number of approximations are applied to this simplified parallel symbol (SPS) detector that lead to the derivation of suboptimal detectors. One such suboptimal detector is shown to be the same as the minimum-metric Viterbi detector. A brief comparison of the SPS detector and the Viterbi detector shows that the former has a slightly better performance at low values of signal-to-noise ratio (SNR) and the latter performs a smaller number of computations (particularly) at higher values of SNR; otherwise, the two detectors are comparable in performance and complexity