DocumentCode
1542897
Title
Bit error rate measurements for GHz code generator circuits
Author
Dean, E.J. ; Dresseihaus, P.D. ; Przybysz, J.X. ; Miklich, A.H. ; Hodge Worsham, A. ; Polonsky, S.V.
Author_Institution
Northrop Grumman Sci. & Technol. Center, Pittsburgh, PA, USA
Volume
9
Issue
2
fYear
1999
fDate
6/1/1999 12:00:00 AM
Firstpage
3598
Lastpage
3601
Abstract
A new method of analyzing bit error rates (BERs) for SFQ circuits and their outputs at GHz speeds will be presented. This method was used to test four- and six-bit pseudorandom code generators. The code generators were operated in free-run mode, i.e., without a synchronization (Reset) pulse. This enabled us to conduct BER testing to much lower levels than when the code generator is operated in Reset mode. The SFQ circuit output was amplified with a superconducting output latch to give voltage levels suitable for display on a sampling scope. The GHz output data was analyzed by external computer software; this permitted extended tests without user supervision. With the code generators operating in free-run mode, they routinely gave bit error rates (BERs) in the 10/sup -11/ range; the best BER recorded was 1.1*10/sup -13/ (2 errors in /spl sim/2.5 hours) at 2 GHz. We have successfully tested these code generators at frequencies in excess of 3.5 GHz with BERs in the 10/sup -10/ range as well.
Keywords
codes; superconducting integrated circuits; 2 to 3.5 GHz; 4 bit; 6 bit; BER testing; SFQ circuit; bit error rate measurement; pseudorandom code generator; superconducting digital circuit; Bit error rate; Circuit testing; Computer displays; Error analysis; Frequency synchronization; Latches; Pulse amplifiers; Pulse generation; Sampling methods; Voltage;
fLanguage
English
Journal_Title
Applied Superconductivity, IEEE Transactions on
Publisher
ieee
ISSN
1051-8223
Type
jour
DOI
10.1109/77.783808
Filename
783808
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