Design and fabrication of a voltage divider utilizing high-T/sub c/ ramp-edge Josephson junctions with a ground plane

Circuit operation of a voltage divider utilizing YBa/sub 2/Cu/sub 3/O/sub x//Co-doped PrBa/sub 2/Cu/sub 3/O/sub y//YBa/sub 2/Cu/sub 3/O/sub x/ ramp-edge Josephson junctions with a ground plane was demonstrated for the voltage region of 0-400 /spl mu/V at 12.5 K, where the maximum voltage corresponds to /spl sim/200 GHz internal Josephson oscillation. This voltage was around the critical current-normal resistance (I/sub c/R/sub n/) product of 420 /spl mu/V. In the design of the voltage divider, a transmission line model was adopted for an inductance loop because of the large dielectric constant of the insulation layer interposed between the ground plane and the wiring serving as a loop inductance. In the fabrication of the circuit, a SrTiO/sub 3//Co-doped PrBa/sub 2/Cu/sub 3/O/sub y//SrTiO/sub 3/ multilayer insulation and four-directional ramp-edge junction process using a photoresist reflow technique were adopted.