DocumentCode :
1544225
Title :
Min/Max circuit for analog convolutional decoders
Author :
Maundy, Brent
Author_Institution :
Dept. of Electr. & Comput. Eng., Calgary Univ., Alta., Canada
Volume :
48
Issue :
8
fYear :
2001
fDate :
8/1/2001 12:00:00 AM
Firstpage :
802
Lastpage :
806
Abstract :
A novel minimum or maximum compare and select circuit is presented in this brief for use in analog convolutional decoders. Based on voltage difference circuits coupled to a decision circuit the proposed circuit can differentiate voltages of 10-mV differences in the simple configuration or 5 mV in an improved configuration. Simulation results indicate an operational speed of 100 Mbits/s of a 3.3-V supply, which is comparable to similar current based, compare and select circuits. In addition, the proposed circuit has only two devices stacked between its rails in contrast to most voltage/current based compare and select circuits with three or more devices. The circuit is, therefore, capable of operation at low supply voltages making it attractive for low power applications
Keywords :
convolutional codes; decision circuits; decoding; low-power electronics; 100 Mbit/s; 3.3 V; analog convolutional decoder; decision circuit; low power circuit; min/max circuit; Artificial neural networks; Convolution; Convolutional codes; Coupling circuits; Decoding; Digital circuits; Digital signal processing; Rails; Viterbi algorithm; Voltage;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7130
Type :
jour
DOI :
10.1109/82.959874
Filename :
959874
Link To Document :
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