Reverse bias instabilities in bipolar power transistors with cellular layout

The different instabilities exhibited by power BJTs during inductive turn-off are classified, and then studied theoretically, by means of two-dimensional (2-D) simulator in which the device is simulated within a realistic external circuit, and experimentally, by means of a nondestructive method. It is shown that many instabilities originate by an interaction between electric field and charge within a single cell, which causes transit time oscillation phenomena. The role of the stray capacitance of the circuit in favoring these instabilities is described. Other kinds of instability cannot be understood by studying a single cell but rather require accounting for the interactions between cells. Finally, an “instability map” is used as a synthetic picture of the device behavior which ensures an easy way to link device behavior with its physical features