• DocumentCode
    1544533
  • Title

    Current status and future trends of SiGe BiCMOS technology

  • Author

    Harame, David L. ; Ahlgren, David C. ; Coolbaugh, Douglas D. ; Dunn, James S. ; Freeman, Gregory G. ; Gillis, John D. ; Groves, Robert A. ; Hendersen, Gregory N. ; Johnson, Robb A. ; Joseph, Alvin J. ; Subbanna, Seshardi ; Victor, Alan M. ; Watson, Kimbal

  • Author_Institution
    IBM Corp., Essex Junction, VT, USA
  • Volume
    48
  • Issue
    11
  • fYear
    2001
  • fDate
    11/1/2001 12:00:00 AM
  • Firstpage
    2575
  • Lastpage
    2594
  • Abstract
    The silicon germanium (SiGe) heterojunction bipolar transistor (HBT) marketplace covers a wide range of products and product requirements, particularly when combined with CMOS in a BiCMOS technology. A new base integration approach is presented which decouples the structural and thermal features of the HBT from the CMOS. The trend is to use this approach for future SiGe technologies for easier migration to advanced CMOS technology generations. Lateral and vertical scaling are used to achieve smaller and faster SiGe HBT devices with greatly increased current densities. Improving both the fT and fMAX will be a significant challenge as the collector and base dopant concentrations are increased. The increasing current densities of the SiGe HBT will put more emphasis on interconnects as a key factor in limiting transistor layout. Capacitors and inductors are two very important passives that must improve with each generation. The trend toward increasing capacitance in polysilicon-insulator-silicon (MOSCAP), polysilicon-insulator-polysilicon (Poly-Poly), and metal-insulator-metal (MIM) capacitors is discussed. The trend in VLSI interconnections toward thinner interlevel dielectrics and metallization layers is counter to the requirements of high Q inductors, potentially requiring a custom last metallization layer
  • Keywords
    BiCMOS integrated circuits; Ge-Si alloys; MIM devices; VLSI; current density; doping profiles; heterojunction bipolar transistors; integrated circuit metallisation; semiconductor materials; semiconductor-insulator-semiconductor devices; BiCMOS technology; MOSCAP; Poly-Poly; SiGe; VLSI; base dopant concentrations; base integration approach; collector dopant concentrations; current densities; custom last metallization layer; heterojunction bipolar transistor; interlevel dielectrics; lateral scaling; metal-insulator-metal capacitors; metallization layers; polysilicon-insulator-polysilicon; polysilicon-insulator-silicon; transistor layout; vertical scaling; BiCMOS integrated circuits; CMOS technology; Capacitance; Current density; Germanium silicon alloys; Heterojunction bipolar transistors; Inductors; MIM capacitors; Metallization; Silicon germanium;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.960385
  • Filename
    960385