DocumentCode :
1545486
Title :
Multigate Buckled Self-Aligned Dual Si Nanowire MOSFETs on Bulk Si for High Electron Mobility
Author :
Najmzadeh, M. ; Tsuchiya, Y. ; Bouvet, D. ; Grabinski, W. ; Ionescu, A.M.
Author_Institution :
Nanoelectronic Devices Lab. (Nanolab), Swiss Fed. Inst. of Technol., Lausanne, Switzerland
Volume :
11
Issue :
5
fYear :
2012
Firstpage :
902
Lastpage :
906
Abstract :
In this paper, we report for the first time making multi-gate buckled self-aligned dual Si nanowires including two sub-100 nm cross-sectional cores on bulk Si substrate using optical lithography, hard mask/spacer technology, and local oxidation. ≈0.8 GPa uniaxial tensile stress was measured on the buckled dual nanowires using micro-Raman spectroscopy. The buckled multigate dual Si nanowires show excellent electrical characteristics, e.g., 62 mV/decade and 42% low-field electron mobility enhancement due to uniaxial tensile stress in comparison to the non-strained device, all at VDS = 50 mV and 293 K.
Keywords :
MOSFET; Raman spectra; electron mobility; elemental semiconductors; high electron mobility transistors; masks; nanoelectronics; nanolithography; nanowires; oxidation; photolithography; silicon; tensile strength; Si; bulk Si substrate; electrical characteristics; hard mask-spacer technology; high electron mobility; local oxidation; low-field electron mobility enhancement; microRaman spectroscopy; multigate buckled self-aligned dual nanowire MOSFET; optical lithography; temperature 293 K; uniaxial tensile stress; voltage 50 mV; Logic gates; MOSFETs; Nanoscale devices; Oxidation; Silicon; Tensile stress; Local oxidation; MOSFET; Si nanowire; local stressor; micro-Raman spectroscopy; multi-gate; strain engineering; uniaxial tensile stress;
fLanguage :
English
Journal_Title :
Nanotechnology, IEEE Transactions on
Publisher :
ieee
ISSN :
1536-125X
Type :
jour
DOI :
10.1109/TNANO.2012.2205401
Filename :
6222004
Link To Document :
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