DocumentCode :
1545524
Title :
A 3.1 mW Continuous-Time ΔΣ Modulator With 5-Bit Successive Approximation Quantizer for WCDMA
Author :
Ranjbar, Mohammad ; Mehrabi, Arash ; Oliaei, Omid ; Carrez, Frederic
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Massachusetts Amherst, Amherst, MA, USA
Volume :
45
Issue :
8
fYear :
2010
Firstpage :
1479
Lastpage :
1491
Abstract :
In this paper, we present a multibit continuous-time delta-sigma modulator based on a 5-bit successive approximation quantizer. The use of successive approximation, instead of flash, is driven by the desire to reduce the quantizer power and area. The quantizer delay is effectively compensated to ensure system stability. The modulator is implemented in a 130 nm CMOS technology and achieves 62 dB of dynamic range over 1.92 MHz while consuming 3.1 mW from a 1.2 V supply.
Keywords :
CMOS integrated circuits; code division multiple access; delta-sigma modulation; 5-bit successive approximation quantizer; CMOS technology; WCDMA; continuous-time ΔΣ modulator; delta-sigma modulator; frequency 1.92 MHz; power 3.1 mW; quantizer delay; size 130 nm; voltage 1.2 V; Bandwidth; CMOS technology; Clocks; Delay; Delta modulation; Dynamic range; Feedback; Multiaccess communication; Quantization; Wideband; $DeltaSigma$ modulator; Continuous-time; data-weighted-averaging; dynamic element matching; excess loop delay; low-power; oversampling; successive approximation;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2010.2047423
Filename :
5518489
Link To Document :
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