A new poly-Si TFT structure with air cavities at the gate-oxide edges

We propose a new poly-Si TFT structure employing air cavities at the edges of gate oxide in order to reduce the threshold voltage shift after electrical stress and to decrease the large leakage current. Due to the low dielectric constant of air, the air cavity behaves as a thick insulator reducing the vertical electric field near the drain, so that poly-Si region under air cavity acts as an offset. The new poly-Si TFT structure has been successfully fabricated by employing wet etching of the gate oxide followed by atmospheric pressure chemical vapor deposition (APCVD) oxide deposition. Our experimental results show that the leakage current is considerably reduced without decrease of the on-current and the device stability such as threshold voltage shift under high-gate bias is also improved.