Direct digital synthesizer with jittered clock

Author

Jenq, Yih-Chyun

Author_Institution

Dept. of Electr. Eng., Portland State Univ., OR, USA

Volume

46

Issue

3

fYear

1997

fDate

6/1/1997 12:00:00 AM

Firstpage

653

Lastpage

655

Abstract

Since the direct digital synthesizer (DDS) can potentially be used as a flexible clock source, it is of interest to study its spectrum purity as well as jitter characteristic. In this paper, we investigate the jitter transfer characteristic of the DDS clock driven by a jittered digital-to-analog converter (DAC) clock. We first derive the dosed form expressions of the spectrum of the DAC output signal with jittered driving clock. These expressions are then used to investigate the spectral structure of the DDS clock. Equations are derived for the calculation of the SNR. For a small phase noise power in the driving clock, the DDS clock SNR is obtained in a simple closed form and is shown to be lower than that of the input driving clock by the amount of 20 log(f_s/d_d) dB, where f_s is the nominal driving clock frequency and f_d is the desirable DDS output clock frequency

Keywords

clocks; digital-analogue conversion; jitter; spectral analysis; transfer functions; waveform generators; DDS clock; closed form; direct digital synthesizer; flexible clock source; input driving clock; jitter characteristic; jitter transfer characteristic; jittered clock; jittered digital-to-analog converter; nominal driving clock frequency; output clock frequency; phase noise power; spectral analysis; spectrum purity; transfer function; waveform synthesiser; Clocks; Digital-analog conversion; Equations; Frequency; Jitter; Phase noise; Signal to noise ratio; Spectral analysis; Synthesizers; Transfer functions;

fLanguage

English

Journal_Title

Instrumentation and Measurement, IEEE Transactions on

Publisher

ieee

ISSN

0018-9456

Type

jour

DOI

10.1109/19.585421

Filename

585421