Base-collector leakage currents in InP/InGaAs double heterojunction bipolar transistors

Author

Caffin, David ; Duchenois, A.-M. ; Héliot, F. ; Besombes, C. ; Benchimol, Jean-Louis ; Launay, P.

Author_Institution

Lab. de Bagneux, CNET, Bagneux, France

Volume

44

Issue

6

fYear

1997

fDate

6/1/1997 12:00:00 AM

Firstpage

930

Lastpage

936

Abstract

For InP/InGaAs HBT´s, base-collector leakage current can restrict their operation to a narrow emitter-collector voltage range. We studied several factors that can degrade the leakage current: the base-collector junction design, the base mesa etching technique, and the base metallization process. A step-graded base-collector heterojunction offered the best results. A leakage free multiple step etching process, combining wet and dry etching, has been developed. Ti/Pt/Au is a suitable base metallization, provided that the platinum layer is not too thick, and that the contact annealing temperature is not too high. Finally, very low leakage current HBT´s were fabricated

Keywords

III-V semiconductors; annealing; etching; gallium arsenide; heterojunction bipolar transistors; indium compounds; leakage currents; semiconductor device metallisation; semiconductor device reliability; InP-InGaAs; InP/InGaAs double heterojunction bipolar transistors; Ti-Pt-Au; Ti/Pt/Au base metallization; base mesa etching technique; base metallization process; base-collector junction design; base-collector leakage currents; contact annealing temperature; dry etching; leakage current degradation factors; leakage free multiple step etching process; step-graded base-collector heterojunction; wet etching; Degradation; Dry etching; Gold; Heterojunctions; Indium gallium arsenide; Indium phosphide; Leakage current; Metallization; Voltage; Wet etching;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.585538

Filename

585538