DocumentCode
1548191
Title
A compact-charge LDD-MOSFET model
Author
Klein, Peter
Author_Institution
Siemens AG, Munich, Germany
Volume
44
Issue
9
fYear
1997
fDate
9/1/1997 12:00:00 AM
Firstpage
1483
Lastpage
1490
Abstract
A compact-charge LDD-MOSFET model, based on an analytical surface potential formulation at source and drain has been derived and implemented in the circuit simulator SABER for all channel length and width down to deep submicrometer. Besides well-known short- and narrow-channel effects, the model includes additional charge effects around the threshold voltage as well as a bias dependent charge description of the overlap LDD(S)-region. These additional capacitance effects are not considered in conventional submicrometer transistor models although they domain the capacitance characteristic with further downscaling. If not taken into account, simulation errors of, e.g., up to 50% in the frequency of a 0.3 μm CMOS ring oscillator or over 100% in the 3 dB critical frequency of amplifier circuits can result
Keywords
MOS integrated circuits; MOSFET; circuit analysis computing; integrated circuit design; semiconductor device models; surface potential; 0.3 micron; SABER; analytical surface potential formulation; bias dependent charge description; capacitance characteristic; channel length; channel width; circuit simulator; compact-charge LDD-MOSFET model; narrow-channel effects; short-channel effects; simulation errors; Analytical models; Capacitance; Capacitance-voltage characteristics; Circuit simulation; Computational modeling; Frequency; Ring oscillators; Semiconductor device modeling; Semiconductor process modeling; Threshold voltage;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.622605
Filename
622605
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