Title :
A low-power backward equalizer for DFE read-channel applications
Author :
Mittal, R. ; Bracken, K.C. ; Carley, L.R. ; Allstot, D.J.
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
fDate :
2/1/1997 12:00:00 AM
Abstract :
A general-purpose backward equalizer for use in decision feedback equalization systems is described. Current-steering techniques are used to achieve high-speed low-power operation. A four-tap prototype for use in a magnetic disk read-channel chip has been implemented in a standard digital 1.2-μm n-well CMOS process. The circuit operates at 67 MHz and dissipates 1 mW/tap from a 3.3 V power supply
Keywords :
CMOS analogue integrated circuits; decision feedback equalisers; magnetic disc storage; 1 mW; 1.2 micron; 3.3 V; 67 MHz; CMOS chip; DFE read-channel; current-steering; decision feedback equalization; four-tap backward equalizer; high-speed low-power circuit; magnetic disk recording; CMOS process; Circuits; Decision feedback equalizers; Detection algorithms; Detectors; Intersymbol interference; Magnetic recording; Magnetic separation; Maximum likelihood detection; Prototypes;
Journal_Title :
Solid-State Circuits, IEEE Journal of
