DocumentCode
1549485
Title
Quantization noise improvement in a hybrid distributed-neuron ANN architecture
Author
Djahanshahi, Hormoz ; Ahmadi, Majid ; Jullien, Graham A. ; Miller, William C.
Author_Institution
Dept. of Electr. & Comput. Eng., Windsor Univ., Ont., Canada
Volume
48
Issue
9
fYear
2001
fDate
9/1/2001 12:00:00 AM
Firstpage
842
Lastpage
846
Abstract
This work explores a useful self-scaling property of a hybrid (analog-digital) artificial neural network architecture based on distributed neurons. In conventional sigmoidal neural networks with lumped neurons, the effect of weight quantization errors becomes more noticeable at the output as the network becomes larger. However, it is shown here based on a stochastic model that the inherent self-scaling property of a distributed-neuron architecture controls the output quantization noise (error) to signal ratio as the number of inputs to an Adaline increases. This property contributes to a robust hybrid VLSI architecture consisting of digital synaptic weights and analog distributed neurons
Keywords
VLSI; integrated circuit noise; mixed analogue-digital integrated circuits; neural chips; neural net architecture; stochastic processes; Adaline inputs; analog distributed neurons; analog-digital ANN architecture; digital synaptic weights; hybrid artificial neural network architecture; hybrid distributed-neuron ANN architecture; output quantization error; output quantization noise to signal ratio; quantization noise improvement; robust hybrid VLSI architecture; self-scaling property; sigmoidal Adaline; stochastic model; Artificial neural networks; Multi-layer neural network; Neural network hardware; Neural networks; Neurons; Quantization; Signal to noise ratio; Stochastic processes; Stochastic resonance; Very large scale integration;
fLanguage
English
Journal_Title
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher
ieee
ISSN
1057-7130
Type
jour
DOI
10.1109/82.964997
Filename
964997
Link To Document