Title :
Programmable 1-D rank filter of O(1) time complexity
Author :
Pedroni, Volnei A.
Author_Institution :
Dept. of Electron. Eng., Fed. Center of Technol. Educ. of Parana, Curitiba, Brazil
fDate :
9/1/2001 12:00:00 AM
Abstract :
An efficient architecture and circuit implementation for programmable rank filtering is presented. The circuit ranks a one-dimensional signal in an amount of time independent of the number of signal values and the rank number. The operation is based on one MIN and one MAX filter, and can be efficiently implemented using winner-take-all circuits of O(1) time complexity and O(n) hardware complexity. SPICE simulations and experimental results from a fabricated CMOS chip are included
Keywords :
CMOS digital integrated circuits; computational complexity; digital filters; nonlinear filters; programmable filters; CMOS chip; MAX filter; MIN filter; circuit implementation; filter architecture; hardware complexity; one-dimensional signal; programmable 1D rank filter; rank filtering; time complexity; winner-take-all circuits; Circuit simulation; Digital signal processing; Digital systems; Educational technology; Filtering; Hardware; Nonlinear filters; SPICE; Switches; Voltage;
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
