Title :
Total TCAD strategy for DFM in IC technology development
Author :
Walton, A.J. ; Fallon, M. ; Newsam, M.I. ; Ferguson, R.S. ; Sprevak, D. ; Elliott, J.P. ; Allan, G.A.
Author_Institution :
Dept. of Electr. Eng., Edinburgh Univ., UK
fDate :
3/1/1997 12:00:00 AM
Abstract :
The authors present some of the simulation tools available to IC technology and circuit designers and discuss their importance in a Design For Manufacturability (DFM) strategy. It is demonstrated how these simulators, when combined with Design Of Experiment (DOE) and Response Surface Methodology (RSM), can be used to increase engineering knowledge while at the same time reducing the number of simulations required to optimise a process. The idea of contour plotting response distribution parameters to help determine robust manufacturing conditions is also introduced together with a methodology of using simulation results to rapidly produce histograms of response distributions. An environment to help automate the above approach is presented, and its use as part of a DFM strategy is illustrated through an example of a process/device optimisation
Keywords :
circuit CAD; circuit optimisation; design for manufacture; design of experiments; integrated circuit design; integrated circuit yield; production engineering computing; semiconductor process modelling; IC technology development; contour plotting; design for manufacturability; design of experiment; histograms; process yield; process/device optimisation; response distribution parameters; response surface methodology; robust manufacturing conditions; simulation tools; technology CAD strategy; total TCAD strategy;
Journal_Title :
Science, Measurement and Technology, IEE Proceedings -
DOI :
10.1049/ip-smt:19970860