DocumentCode :
1550168
Title :
Time-domain model for power dissipation of CMOS buffers driving lossy lines
Author :
Cappuccino, G. ; Cocorullo, G.
Author_Institution :
Dept. of Electron. Comput. Sci. & Syst., Calabria Univ., Italy
Volume :
35
Issue :
12
fYear :
1999
fDate :
6/10/1999 12:00:00 AM
Firstpage :
959
Lastpage :
960
Abstract :
The dynamic power consumption of a CMOS buffer driving lossless and lossy transmission lines is investigated. A time-domain model for power dissipation in both the line driver and the interconnect losses is also presented. The model fully agrees with HSPICE simulations and is particularly suitable for implementation in CAD tools for fast estimation of VLSI dissipation circuits
Keywords :
CMOS digital integrated circuits; VLSI; driver circuits; integrated circuit interconnections; integrated circuit modelling; losses; low-power electronics; time-domain analysis; transient analysis; CAD tool implementation; CMOS buffers; VLSI dissipation circuits; dynamic power consumption; fast estimation; interconnect losses; line driver; lossy lines; low power VLSI design; power dissipation; switching transients; time-domain model;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19990704
Filename :
788042
Link To Document :
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