DocumentCode :
1550841
Title :
A comprehensive study on p/sup +/ polysilicon-gate MOSFET´s instability with fluorine incorporation
Author :
Sung, Janmye James ; Lu, Chih-Yuan
Author_Institution :
AT&T Bell Lab., Allentown, PA, USA
Volume :
37
Issue :
11
fYear :
1990
Firstpage :
2312
Lastpage :
2321
Abstract :
It is reported that fluorine can jeopardize p/sup +/-gate devices under moderate annealing temperatures. MOSFETs with BF/sub 2/ or boron-implanted polysilicon gates were processed identically except at gate implantation. Evidence of boron penetration through 12.5-nm oxide and a large quantity of negative charge penetration (10/sup 12/ cm/sup -2/) by fluorine even at moderate annealing conditions is reported. The degree of degradation is aggravated as fluorine dose increases. A detailed examination of the I-V characteristics of PMOSFET with fluorine incorporated p/sup +/-gate revealed that the long gate-length device had abnormal abrupt turn-on I/sub d/-V/sub g/ characteristics, while the submicrometer-gate-length devices appeared to be normal. The abnormal turn-on I/sub d/-V/sub g/ characteristics associated with long-gate-length p/sup +/-gate devices vanished when the device was subjected to X-ray irradiation and/or to a high-voltage DC stressing at the source/drain. The C-V characteristics of MOS structures of various gate dopants, processing ambients, doping concentrations, and annealing conditions were studied. Based on all experimental results, the degradation model of p/sup +/-gate devices is presented. The incorporation of fluorine in the p/sup +/ gate enhances boron penetration through the thin gate oxide into the silicon substrate and creates negative-charge interface states. The addition of H/OH species into F-rich gate oxide will further aggravate the extent of F-enhanced boron penetration by annealing out the negative-charge interface states.<>
Keywords :
insulated gate field effect transistors; ion implantation; semiconductor doping; 12.5 nm; C-V characteristics; F enhanced B penetration; I-V characteristics; PMOSFET; Si:BF/sub 2/; Si:F; SiO/sub 2/:F; X-ray irradiation; abnormal abrupt turn-on; annealing conditions; degradation model; degree of degradation; doping concentrations; experimental results; gate dopants; high-voltage DC stressing; long gate-length device; moderate annealing temperatures; negative charge penetration; negative-charge interface states; polycrystalline Si gates; processing ambients; submicrometer-gate-length devices; thin gate oxide; Annealing; Boron; CMOS technology; Fluctuations; Interface states; MOS capacitors; MOSFET circuits; Silicides; Threshold voltage; Tungsten;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.62294
Filename :
62294
Link To Document :
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