Applications of sequence space and SRG theories to distributed sample scrambling

In this paper, we consider how to apply the sequence space and the shift register generator (SRG) theories to distributed sample scrambling (DSS), which exhibits the best performance in scrambling of small frame-sized signals. We first consider how to predict scrambling sequences using their samples, which is a basic problem for a proper synchronization within the DSS systems. Then for DSS scramblers, we consider how to determine the scrambler SRGs and the sampling times for conveying information on the scrambling sequence; and for DSS descramblers, we consider how to determine the descrambler SRGs, the correction times, and the correction vectors for a proper synchronization. We further examine how to realize the scramblers and the descramblers with minimized circuit complexity. Finally, we demonstrate how to apply the results to DSS scramblers and descramblers for application in cell-based asynchronous transfer mode (ATM) transmission