• DocumentCode
    1551931
  • Title

    Architecture for fault diagnosis of CMOS ICs with BIC based IDDQ testing

  • Author

    Segura, Jaume ; Isern, E. ; Roca, M.

  • Author_Institution
    Dept. of Phys., Balearic Islands Univ., Palma de Mallorca
  • Volume
    35
  • Issue
    14
  • fYear
    1999
  • fDate
    7/8/1999 12:00:00 AM
  • Firstpage
    1152
  • Lastpage
    1153
  • Abstract
    An architecture for simplifying fault diagnosis is presented. The method is applied to circuits incorporating built-in current (BIC) sensors and is based on hardware partitioning, does not increase the number of pins and is independent of the fault diagnosis heuristic at the logic level
  • Keywords
    CMOS integrated circuits; built-in self test; fault diagnosis; integrated circuit testing; CMOS IC; IDDQ testing; built-in current sensor; circuit architecture; fault diagnosis; hardware partitioning;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19990797
  • Filename
    788936