• DocumentCode
    1553455
  • Title

    Time-delay neural networks: representation and induction of finite-state machines

  • Author

    Clouse, Daniel S. ; Giles, C. Lee ; Horne, Bill G. ; Cottrell, Garrison W.

  • Author_Institution
    California Univ., San Diego, La Jolla, CA, USA
  • Volume
    8
  • Issue
    5
  • fYear
    1997
  • fDate
    9/1/1997 12:00:00 AM
  • Firstpage
    1065
  • Lastpage
    1070
  • Abstract
    In this work, we characterize and contrast the capabilities of the general class of time-delay neural networks (TDNNs) with input delay neural networks (IDNNs), the subclass of TDNNs with delays limited to the inputs. Each class of networks is capable of representing the same set of languages, those embodied by the definite memory machines (DMMs), a subclass of finite-state machines. We demonstrate the close affinity between TDNNs and DMM languages by learning a very large DMM (2048 states) using only a few training examples. Even though both architectures are capable of representing the same class of languages, they have distinguishable learning biases. Intuition suggests that general TDNNs which include delays in hidden layers should perform well, compared to IDNNs, on problems in which the output can be expressed as a function on narrow input windows which repeat in time. On the other hand, these general TDNNs should perform poorly when the input windows are wide, or there is little repetition. We confirm these hypotheses via a set of simulations and statistical analysis
  • Keywords
    backpropagation; delay circuits; feedforward neural nets; finite state machines; formal languages; neural net architecture; sequential circuits; automata theory; backpropagation; definite memory machines; feedforward neural nets; finite-state machines; gradient descent learning; hidden layers; inductive bias; input delay neural networks; language induction; sequential circuits; temporal sequences; time-delay neural networks; Analytical models; Automata; Boolean functions; Circuit simulation; Data structures; Delay effects; National electric code; Neural networks; Sequential circuits; Statistical analysis;
  • fLanguage
    English
  • Journal_Title
    Neural Networks, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1045-9227
  • Type

    jour

  • DOI
    10.1109/72.623208
  • Filename
    623208