Temperature-Aware Architecture: Lessons and Opportunities

Managing temperature has become an important concern in modern processor and other microelectronic chips. The problem has become especially severe as the ability to reduce supply voltage has slowed. As a result, the number of devices per unit area is sca ing up faster than the power density is scaling down. This requires more expensive cooling solutions to keep the chip and its local hotspots cool, and these challenges will be exacerbated by 3D integration, which seems imminent. Furthermore, high temperature slows integrated circuits because of degraded carrier mobility and interconnect resistivity. It also accelerates multiple chip-failure mechanisms such as electromigration and negative bias temperature instability (NBTI), because the wearout rate has an exponential temperature dependency. Static leakage power is primarily an exponential function of temperature. There´s also the possibility of thermally induced security vulnerabilities, such as denial of service. Unfortunately, air cooling´s ability to address temperature concerns is limited by system-level power constraints, acoustic challenges, and sometimes form factors, while alternative cooling solutions are still too expensive for commodity use. Temperature-aware design can reduce these problems.