Title :
Error Tolerance in Server Class Processors
Author :
Rivers, Jude A. ; Gupta, Meeta S. ; Shin, Jeonghee ; Kudva, Prabhakar N. ; Bose, Pradip
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fDate :
7/1/2011 12:00:00 AM
Abstract :
This paper provides: 1) a very brief motivation and technological trend data to show why hard and soft errors are expected to be of increasing concern in the future; 2) a summary review of chip-level error tolerance practices today-with a brief reference to IBM´s POWER6 and POWER7 designs; 3) open research challenges and current solution approaches of promise, based on published literature; and 4) concluding remarks.
Keywords :
error statistics; fault tolerance; integrated circuit design; integrated circuit reliability; microprocessor chips; IBM; POWER6 design; POWER7 design; chip-level error tolerance practices; current solution approaches; hard errors; open research challenges; published literature; server class processors; soft errors; Error correction codes; Microprocessors; Pipelines; Program processors; Redundancy; Registers; Checkpointing; error recovery; lifetime reliability; soft errors; variability;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2011.2158100
