• DocumentCode
    1553964
  • Title

    An efficient cut-based algorithm on minimizing the number of L-shaped channels for safe routing ordering

  • Author

    Yan, Jin-Tai

  • Author_Institution
    Dept. of Comput. Sci. & Inf. Eng., Chung Hua Univ., Hsinchu, Taiwan
  • Volume
    18
  • Issue
    10
  • fYear
    1999
  • fDate
    10/1/1999 12:00:00 AM
  • Firstpage
    1519
  • Lastpage
    1526
  • Abstract
    Because definition of L-shaped channels in a floorplan graph breaks all the cyclic precedence constraints in a building block layout, routing space in a layout can be fully separated and defined as straight and L-shaped channels to guarantee a safe routing ordering. However, L-shaped channel routing is more difficult than straight channel routing. Hence, it is necessary for the completion of detailed routing to minimize the number of L-shaped channels in channel definition of a floorplan graph. In this paper, based on a geometrical topology of a floorplan graph and precedence relations in a channel precedence graph, cuts in a floorplan graph are classified into S-cuts, redundant L-cuts, balanced L-cuts, nonminimal L-cuts, noncritical L-cuts and critical L-cuts. An efficient cut-based algorithm on minimizing the number of L-shaped channels in channel definition of a floorplan graph is proposed, and the time complexity of our cut-based algorithm is proved to be in O(n) time, where n is the number of line segments in a floorplan graph. Finally, several examples have been tested on Dai´s algorithm [1985], Cai´s algorithm [1993] and our cut-based algorithm, respectively. The experimental results show that our cut-based algorithm defines fewer L-shaped channels in a floorplan graph than Dai´s algorithm and Cai´s algorithm to guarantee a safe routing ordering
  • Keywords
    VLSI; circuit layout CAD; computational complexity; integrated circuit layout; network routing; network topology; L-shaped channels; S-cuts; balanced L-cuts; channel definition; critical L-cuts; cut-based algorithm; cyclic precedence constraints; floorplan graph; geometrical topology; line segments; noncritical L-cuts; nonminimal L-cuts; precedence relations; redundant L-cuts; routing ordering; routing space; time complexity; Algorithm design and analysis; Compaction; Computer science; Design engineering; Heuristic algorithms; Routing; Testing; Topology; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.790629
  • Filename
    790629