DocumentCode :
1554152
Title :
Hierarchical Simulation of Process Variations and Their Impact on Circuits and Systems: Methodology
Author :
Lorenz, Jürgen K. ; Bär, Eberhard ; Clees, Tanja ; Jancke, Roland ; Salzig, Christian P J ; Selberherr, Siegfried
Author_Institution :
Fraunhofer Inst. for Integrated Syst. & Device Technol. (IISB), Erlangen, Germany
Volume :
58
Issue :
8
fYear :
2011
Firstpage :
2218
Lastpage :
2226
Abstract :
Process variations increasingly challenge the manufacturability of advanced devices and the yield of integrated circuits. Technology computer-aided design (TCAD) has the potential to make key contributions to minimize this problem, by assessing the impact of certain variations on the device, circuit, and system. In this way, TCAD can provide the information necessary to decide on investments in the processing level or the adoption of a more variation tolerant process flow, device architecture, or design on circuit or chip level. In this first of two consecutive papers, sources of process variations and the state of the art of related simulation tools are reviewed. An approach for hierarchical simulation of process variations including their correlations is presented. The second paper, also published in this issue, presents examples of simulation results obtained with this methodology.
Keywords :
digital simulation; electronic engineering computing; technology CAD (electronics); TCAD; hierarchical simulation; integrated circuits; process variations; technology computer-aided design; Etching; Integrated circuit modeling; Lithography; Mathematical model; Numerical models; Resists; Semiconductor device modeling; Circuit simulation; manufacturability; process modeling; semiconductor device modeling; sensitivity; yield;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2011.2150225
Filename :
5876309
Link To Document :
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