Title :
Degradation due to electrical stress of poly-Si thin film transistors with various LDD lengths
Author :
Yong-Sang Kim ; Min-Koo Han
Author_Institution :
Dept. of Electr. Eng., Myongji Univ., Kyongki, South Korea
fDate :
6/1/1995 12:00:00 AM
Abstract :
The degradation phenomena of polycrystalline silicon (poly-Si) thin film transistors (TFT´s) with various lightly-doped drain (LDD) length have been investigated. It is observed that the threshold voltage shift due to electrical stress varies with LDD length. The threshold voltage shift after 4 hours electrical stress of V/sub g/=V/sub d/=30 V in conventional, 0.5 μm, and 2 μm LDD poly-Si TFT´s are about 2.7 V, 5.2 V, and 0.8 V, respectively.
Keywords :
silicon; 0.5 micron; 2 micron; 30 V; 4 hour; LDD lengths; Si; degradation phenomena; electrical stress; lightly-doped drain; poly-Si thin film transistors; polycrystalline Si; polysilicon TFT; threshold voltage shift; Active matrix liquid crystal displays; Degradation; Hydrogen; Leakage current; Plasma density; Plasma devices; Silicon; Stress; Thin film transistors; Threshold voltage;
Journal_Title :
Electron Device Letters, IEEE
