DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient Computing

Author

Govindaraju, Venkatraman ; Ho, Chen-Han ; Nowatzki, Tony ; Chhugani, Jatin ; Satish, Nadathur ; Sankaralingam, Karthikeyan ; Kim, Changkyu

Volume

32

Issue

5

fYear

2012

Firstpage

38

Lastpage

51

Abstract

The DySER (Dynamically Specializing Execution Resources) architecture supports both functionality specialization and parallelism specialization. By dynamically specializing frequently executing regions and applying parallelism mechanisms, DySER provides efficient functionality and parallelism specialization. It outperforms an out-of-order CPU, Streaming SIMD Extensions (SSE) acceleration, and GPU acceleration while consuming less energy. The full-system field-programmable gate array (FPGA) prototype of DySER integrated into OpenSparc demonstrates a practical implementation.

Keywords

field programmable gate arrays; parallel processing; power aware computing; resource allocation; DySER architecture; FPGA; GPU acceleration; OpenSparc; dynamically specializing execution resources; energy-efficient computing; field-programmable gate array; functionality specialization; out-of-order CPU; parallelism mechanism; parallelism specialization; streaming SIMD extension; Computer architecture; Energy efficiency; Field programmable gate arrays; Hardware; Parallel processing; Prototypes; DySER; accelerator; architecture; data-level parallelism; energy efficiency; specialization;

fLanguage

English

Journal_Title

Micro, IEEE

Publisher

ieee

ISSN

0272-1732

Type

jour

DOI

10.1109/MM.2012.51

Filename

6235947