• DocumentCode
    1554769
  • Title

    Fault-secure parity prediction arithmetic operators

  • Author

    Nicolaidis, Michael ; Duarte, Ricardo O. ; Manich, Salvador ; Figueras, Joan

  • Author_Institution
    TIMA Lab., SGS-Thomson Microelectron., Grenoble, France
  • Volume
    14
  • Issue
    2
  • fYear
    1997
  • Firstpage
    60
  • Lastpage
    71
  • Abstract
    Although parity prediction arithmetic operators are compatible with systems checked by parity codes, they are not secure against single faults. The authors determine the necessary conditions for fault secureness and derive designs embodying these conditions
  • Keywords
    digital arithmetic; fault tolerant computing; hardware description languages; logic CAD; logic testing; cellular arithmetic operations; concurrent error detection; fault secureness; fault-secure parity prediction arithmetic operators; single-fault condition; Circuit faults; Digital arithmetic; Electrical fault detection; Fault detection; Hardware; Logic; Merging; Read-write memory; Registers; System testing;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/54.587743
  • Filename
    587743
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1554769