Integrated analogue voltage multiplier combining MOS and bipolar transistors

An analogue voltage multiplier (AVM) using a bipolar transistor core fabricated using a standard CMOS process is reported. A bipolar core is introduced to capitalise on the superior linearity of bipolar transistors in this application. The circuit achieves a typical nonlinearity of 0.1% full-scale at half-scale output voltage and the performance is compared with a CMOS AVM fabricated on the same wafer.