Title :
Skewing clock to decide races - double-edge-triggered flip-flop
Author :
Varma, P. ; Ramganesh, K.N.
Author_Institution :
IBM Indian Inst. of Technol., New Delhi, India
fDate :
12/6/2001 12:00:00 AM
Abstract :
A clock-skew-based methodology for deciding races that are ordinarily settled by making feedback paths weak or resistive is proposed. Applying this to earlier work, a new static, double-edge-triggered flip-flop is derived that shows significant gains in terms of reduced power, increased frequency, and reduced gate area
Keywords :
clocks; decision circuits; flip-flops; hazards and race conditions; clock skew; double-edge-triggered flip-flop; race decision circuit;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20011036
