Title :
Efficient implementations of search trees on parallel distributed memory architectures
Author :
Colbrook, A. ; Smythe, C.
Author_Institution :
Lab. for Comput. Sci., MIT, Cambridge, MA, USA
fDate :
9/1/1990 12:00:00 AM
Abstract :
A scheme for maintaining a balanced search tree on a distributed memory parallel architecture is described. A general 2P-2-2P (for integer P>or=3) search tree is introduced with a linear array of up to (log2 N/(P-2))+1 processors being used to implement such a search tree. As many as ((log2 N/(P-2))+1)/2 operations can execute concurrently. Insertion and deletion transformations are described and several search trees are demonstrated on an array of transputer processors. Variations in both the number of processors allocated to the array and the value of P allow the optimal search structure for a given architecture to be determined.
Keywords :
parallel architectures; search problems; trees (mathematics); deletion; insertion; linear array; parallel distributed memory architectures; search trees; transputer processors;
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E