DocumentCode
1555403
Title
Balancing contention and synchronization on the Intel Paragon
Author
Bokhari, Shahid H. ; Nicol, David M.
Author_Institution
Univ. of Eng. & Technol., Lahore, Pakistan
Volume
5
Issue
2
fYear
1997
Firstpage
74
Lastpage
83
Abstract
The authors show how synchronization time can be reduced by increasing contention. Their experience indicates that, despite improvements in interprocessor communication hardware, parallel algorithm designers still need to take topology into account to obtain high performance
Keywords
distributed memory systems; message passing; multiprocessor interconnection networks; parallel algorithms; parallel machines; software performance evaluation; Intel Paragon; contention; parallel algorithm design; synchronization; topology; Algorithm design and analysis; Concurrent computing; Educational institutions; Hardware; Integrated circuit interconnections; Message passing; Parallel algorithms; Power engineering and energy; Processor scheduling; Routing;
fLanguage
English
Journal_Title
Concurrency, IEEE
Publisher
ieee
ISSN
1092-3063
Type
jour
DOI
10.1109/4434.588296
Filename
588296
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