DocumentCode
1555625
Title
Three-terminal silicon surface junction tunneling device for room temperature operation
Author
Koga, Junji ; Toriumi, Akira
Author_Institution
Adv. LSI Technol. Lab., Toshiba Corp., Yokohama, Japan
Volume
20
Issue
10
fYear
1999
Firstpage
529
Lastpage
531
Abstract
This letter reports excellent negative differential conductance (NDC) characteristics at room temperature in a three-terminal silicon surface junction tunneling (Si SJT) device, with the peak-to-valley current ratio of more than two. The tunneling device was fabricated on a SIMOX wafer to achieve an extremely small bulk leakage current together with a sharp drain impurity profile. In addition, a ring-shaped gate structure was employed to eliminate the effect of the field oxide corner, resulting in the significant reduction of an excess tunneling current at the tunneling junction. As a simple circuit demonstration, gate-controlled latch characteristics are also shown, which cannot be easily achieved by a two-terminal tunneling device.
Keywords
SIMOX; doping profiles; elemental semiconductors; leakage currents; negative resistance devices; silicon; tunnel transistors; SIMOX wafer; Si-SiO/sub 2/; bulk leakage current; circuit demonstration; excess tunneling current; field oxide corner effect; gate-controlled latch characteristics; negative differential conductance characteristics; peak-to-valley current ratio; ring-shaped gate structure; room temperature operation; sharp drain impurity profile; three-terminal Si surface junction tunneling device; Circuits; Fabrication; Impurities; Latches; Leakage current; Nanoscale devices; Scanning electron microscopy; Silicon; Temperature sensors; Tunneling;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/55.791932
Filename
791932
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