• DocumentCode
    1555764
  • Title

    Consideration of thermal constraints during multichip module placement

  • Author

    Carothers, J.D.

  • Volume
    33
  • Issue
    12
  • fYear
    1997
  • fDate
    6/5/1997 12:00:00 AM
  • Firstpage
    1043
  • Lastpage
    1045
  • Abstract
    A multichip module placement algorithm which handles heat distribution as well as traditional placement objectives is presented. The algorithm uses a combined quad-partitioning genetic search, and simulated annealing technique. Experimental results show improvements in the min-cut and simulated annealing algorithms, in terms of net length, while satisfying the heat distribution constraints
  • Keywords
    circuit layout CAD; genetic algorithms; integrated circuit layout; multichip modules; simulated annealing; temperature distribution; MPH algorithm; heat distribution; min-cut; multichip module placement; net length; quad-partitioning genetic search; simulated annealing; thermal constraint;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19970675
  • Filename
    588428
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1555764