DocumentCode
1555772
Title
Ultra-high speed, low power monolithic photoreceiver using InP/lnGaAs double-heterojunction bipolar transistors
Author
Sano, Eiichi ; Sano, Ko ; Otsuji, Taiichi ; Kurishima, Kenji ; Yamahata, S.
Author_Institution
NTT Syst. Electron. Lab., Atsugi
Volume
33
Issue
12
fYear
1997
fDate
6/5/1997 12:00:00 AM
Firstpage
1047
Lastpage
1048
Abstract
A first 40 Gbit/s RZ response is successfully obtained for monolithic photoreceivers by using a PIN/DHBT configuration in which the PIN-PD is formed on the layer structure that corresponds to the base-to-collector region of the DHBTs. The power dissipation of the photoreceiver is only 54 mW
Keywords
III-V semiconductors; digital communication; gallium arsenide; heterojunction bipolar transistors; indium compounds; integrated optoelectronics; optical receivers; p-i-n photodiodes; 40 Gbit/s; 54 mW; DHBTs; Gbit/s RZ response; InP-InGaAs; PIN/DHBT configuration; base-to-collector region; double-heterojunction bipolar transistors; low power monolithic photoreceiver; power dissipation; ultra-high speed operation;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19970672
Filename
588430
Link To Document