DocumentCode
1556072
Title
Verilog: accelerating digital design
Author
Blair, Gerard M
Author_Institution
Dept. of Electr. Eng., Edinburgh Univ., UK
Volume
9
Issue
2
fYear
1997
fDate
4/1/1997 12:00:00 AM
Firstpage
68
Lastpage
72
Abstract
At a first glance, Verilog is simply a language for digital hardware simulation, but in practice it has become the linchpin for a complete design flow from concept to digital component. This article describes the ideas behind the language and its growing role in digital design
Keywords
digital simulation; hardware description languages; logic CAD; accelerating digital design; digital component; digital design; digital hardware simulation language; hardware description language;
fLanguage
English
Journal_Title
Electronics & Communication Engineering Journal
Publisher
iet
ISSN
0954-0695
Type
jour
DOI
10.1049/ecej:19970203
Filename
588557
Link To Document