A 2-V 7.2° jitter AM-suppression CMOS amplifier using current-mode hybrid magnitude control

Author

Huang, Kuang-Hu ; Wang, Wei-Cheng ; Yang, Tang-Huei ; Wang, Chorng-Kuang

Author_Institution

Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan

Volume

34

Issue

10

fYear

1999

fDate

10/1/1999 12:00:00 AM

Firstpage

1373

Lastpage

1381

Abstract

This paper proposes an AM-suppression CMOS amplifier that incorporates a discrete-level automatic gain control (AGC) with a hysteresis hard limiter in order to reduce magnitude dependent jitter and speed up AM-suppression response. The gain control that is composed of a transition-based magnitude controller and a discrete-level current-mode variable gain amplifier (VGA) does not require coherent detection and external components. The prototype amplifier demonstrates a jitter of 7.2° from 1-Mb/s pulse-point modulated (PPM) data input with 20-dB dynamic range (40-400 mV_pp), which is six times improvement over the conventional limiter alone approach. The amplifier with an active area of 0.64 mm² is implemented in 0.8-μm single-poly double-metal digital CMOS technology. It consumes 18 mW from a single 2-V supply

Keywords

CMOS analogue integrated circuits; automatic gain control; current-mode circuits; jitter; limiters; optical communication equipment; pulse amplifiers; pulse position modulation; 0.8 micron; 1 Mbit/s; 18 mW; 2 V; AM-suppression CMOS amplifier; active area; current-mode hybrid magnitude control; discrete-level automatic gain control; discrete-level current-mode variable gain amplifier; hysteresis hard limiter; magnitude dependent jitter; pulse-point modulated data input; transition-based magnitude controller; Automatic control; Circuits; Detectors; Dynamic range; Gain control; Hysteresis; Jitter; Pulse amplifiers; Pulse modulation; Timing;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.792606

Filename

792606