Title :
A 2.4-GHz CMOS receiver for IEEE 802.11 wireless LANs
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
fDate :
10/1/1999 12:00:00 AM
Abstract :
This paper describes a radio-frequency receiver targeting spread-spectrum wireless local-area-network applications in the 2.4-GHz band. Based on a direct-conversion architecture, the receiver employs partial channel selection filtering, dc offset removal, and baseband amplification. Fabricated in a 0.6-μm CMOS technology, the receiver achieves a noise figure of 8.3 dB, IP3 of -9 dBm, IP2 of +22 dBm, and voltage gain of 34 dB while dissipating 80 mW from a 3-V supply
Keywords :
CMOS analogue integrated circuits; partial response channels; radio receivers; spread spectrum communication; wireless LAN; 0.6 micron; 2.4 GHz; 3 V; 34 dB; 8.3 dB; 80 mW; CMOS receiver; IEEE 802.11 wireless LAN; IP2; IP3; baseband amplification; dc offset removal; direct-conversion architecture; partial channel selection filtering; radio-frequency receiver; spread-spectrum applications; voltage gain; Baseband; CMOS technology; Circuits; Filtering; Local area networks; Noise figure; Radio frequency; Signal to noise ratio; Spread spectrum communication; Wireless LAN;
Journal_Title :
Solid-State Circuits, IEEE Journal of
