Title :
Optimally Maximizing Iteration-Level Loop Parallelism
Author :
Liu, Duo ; Wang, Yi ; Shao, Zili ; Guo, Minyi ; Xue, Jingling
Author_Institution :
Dept. of Comput., Hong Kong Polytech. Univ., Kowloon, China
fDate :
3/1/2012 12:00:00 AM
Abstract :
Loops are the main source of parallelism in many applications. This paper solves the open problem of extracting the maximal number of iterations from a loop to run parallel on chip multiprocessors. Our algorithm solves it optimally by migrating the weights of parallelism-inhibiting dependences on dependence cycles in two phases. First, we model dependence migration with retiming and formulate this classic loop parallelization into a graph optimization problem, i.e., one of finding retiming values for its nodes so that the minimum nonzero edge weight in the graph is maximized. We present our algorithm in three stages with each being built incrementally on the preceding one. Second, the optimal code for a loop is generated from the retimed graph of the loop found in the first phase. We demonstrate the effectiveness of our optimal algorithm by comparing with a number of representative nonoptimal algorithms using a set of benchmarks frequently used in prior work and a set of graphs generated by TGFF.
Keywords :
graph theory; iterative methods; microprocessor chips; multiprocessing systems; optimisation; parallel processing; chip multiprocessor; dependence migration modelling; graph optimization problem; iteration-level loop parallelism; parallelism-inhibiting dependency; Indexes; Kernel; Law; Optimization; Parallel processing; Polynomials; Loop parallelization; data dependence graph; iteration-level parallelism.; loop transformation; retiming;
Journal_Title :
Parallel and Distributed Systems, IEEE Transactions on
DOI :
10.1109/TPDS.2011.171