Title :
Event-Driven GHz-Range Continuous-Time Digital Signal Processor With Activity-Dependent Power Dissipation
Author :
Kurchuk, Mariya ; Weltin-Wu, Colin ; Morche, Dominique ; Tsividis, Yannis
Author_Institution :
Columbia Univ., New York, NY, USA
Abstract :
Presented is a clockless, continuous-time (CT) GHz processor that bypasses some of the limitations of conventional digital and analog implementations. Per-edge digital signal encoding is used for parallel processing of continuous-time samples with a temporal spacing as narrow as 15 ps, generated by a 3-b CT flash ADC. Parallel digital delay chains and programmable charge pumps realize the asynchronous filtering operation, each consuming negligible power while awaiting a new sample. A six-tap CT ADC and CT digital FIR processor system occupies 0.07 mm2 and achieves dynamic range of over 20 dB in the 0.8-3.2-GHz signal range. The system´s rate of operations automatically adapts to the signal, thus causing its power dissipation to vary in the range of 1.1 to 10 mW according to input activity.
Keywords :
FIR filters; MMIC; UHF integrated circuits; analogue-digital conversion; charge pump circuits; continuous time filters; digital signal processing chips; encoding; CT GHz processor; CT digital FIR processor system; DSP; activity-dependent power dissipation; asynchronous filtering operation; digital signal processor; event-driven GHz-range continuous-time digital signal processor; flash ADC; frequency 0.8 GHz to 3.2 GHz; parallel digital delay chain; parallel processing; per-edge digital signal encoding; power 1.1 mW to 10 mW; programmable charge pumps; six-tap CT ADC; Capacitors; Clocks; Delay; Digital signal processing; Finite impulse response filter; Power dissipation; Quantization; Asynchronous processing; CT digital signal processor (DSP); CT processing; continuous-time (CT) digital filter;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2012.2203459
