• DocumentCode
    1557300
  • Title

    DC power-bus modeling and design with a mixed-potential integral-equation formulation and circuit extraction

  • Author

    Fan, Jun ; Drewniak, James L. ; Shi, Hao ; Knighten, James L.

  • Author_Institution
    Electromagn. Compatibility Lab., Missouri Univ., Rolla, MO, USA
  • Volume
    43
  • Issue
    4
  • fYear
    2001
  • fDate
    11/1/2001 12:00:00 AM
  • Firstpage
    426
  • Lastpage
    436
  • Abstract
    The application of a circuit extraction approach based on a mixed-potential integral equation formulation (CEMPIE) for DC power-bus modeling in high-speed digital designs is detailed. Agreement with measurements demonstrates the effectiveness of the approach. Dielectric losses are included into the calculation of the Green´s functions, and thus, incorporated into the rigorous first principles formulation. A SPICE model is then extracted from the discretized integral equation. A quasistatic approximation is used for the Green´s functions to keep the extracted circuit elements frequency independent. Previous work has established a necessary meshing criterion in order to ensure accuracy for a given substrate thickness and dielectric constant to a desired frequency. Several power-bus design issues, such as surface mount decoupling and power-plane segmentation, were investigated using the modeling approach. The results and discussions illustrate the application of the method to DC power-bus design for printed circuit and multi-chip module substrates
  • Keywords
    Green´s function methods; SPICE; approximation theory; circuit CAD; dielectric losses; digital circuits; integral equations; multichip modules; printed circuit design; DC power-bus design; DC power-bus modeling; Green´s functions; SPICE model; circuit extraction; dielectric constant; dielectric losses; frequency independent circuit elements; high-speed digital design; mixed-potential integral-equation; multichip module substrates; necessary meshing criterion; power-plane segmentation; quasistatic approximation; substrate thickness; surface mount decoupling; Capacitors; Circuit noise; Dielectric losses; Dielectric substrates; Electromagnetic compatibility; Equivalent circuits; Frequency; Integral equations; Printed circuits; SPICE;
  • fLanguage
    English
  • Journal_Title
    Electromagnetic Compatibility, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9375
  • Type

    jour

  • DOI
    10.1109/15.974622
  • Filename
    974622