• DocumentCode
    1557582
  • Title

    Low field electron and hole mobility of SOI transistors fabricated on ultrathin silicon films for deep submicrometer technology application

  • Author

    Esseni, David ; Mastrapasqua, Marco ; Celler, George K. ; Fiegna, Claudio ; Selmi, Luca ; Sangiorgi, Enrico

  • Author_Institution
    DIEGM, Udine Univ., Italy
  • Volume
    48
  • Issue
    12
  • fYear
    2001
  • fDate
    12/1/2001 12:00:00 AM
  • Firstpage
    2842
  • Lastpage
    2850
  • Abstract
    In this paper, we present a comprehensive experimental characterization of electron and hole effective mobility (μeff ) of ultrathin SOI n- and p-MOSFETs. Measurements have been performed at different temperatures using a special test structure able to circumvent parasitic resistance effects. Our results indicate that, at large inversion densities (Ninv), the mobility of ultrathin SOI transistors is largely insensitive to silicon thickness (T SI) and is larger than in heavily doped bulk MOS because of a lower effective field. At small Ninv, instead, mobility of SOI transistors exhibits a systematic reduction with decreasing TSI . The possible explanation for this μeff degradation in extremely thin silicon layers is discussed by means of a comparison to previously published experimental data and theoretical calculations. Our analysis suggests a significant role is played by an enhancement of phonon scattering due to carrier confinement in the thinnest semiconductor films. The experimental mobility data have then been used to study the possible implications for ultrashort SOI transistor performance using numerical simulations
  • Keywords
    MOSFET; capacitance; electron mobility; electron-phonon interactions; hole mobility; semiconductor device models; semiconductor device testing; silicon-on-insulator; LOCOS; SOI MOSFETs; capacitance-voltage characteristics; carrier confinement; deep submicrometer technology; large inversion densities; low field electron mobility; low field hole mobility; numerical simulations; phonon scattering; silicon thickness; test structure; ultrashort SOI transistor performance; ultrathin SOI transistors; ultrathin Si films; Charge carrier processes; Degradation; Electrical resistance measurement; Electron mobility; MOSFET circuits; Performance evaluation; Phonons; Silicon; Temperature; Testing;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.974714
  • Filename
    974714